1. Field of the Invention
The present invention relates to an integrated circuit device and a fabrication method thereof. More particularly, the present invention relates to a capacitor in a dual damascene interconnect system and a method of integrating the fabrication of a capacitor into a dual damascene process.
2. Description of Related Art
Capacitors are often used in integrated circuits (ICs). Conventionally, forming a capacitor in an interconnect system requires great deviation from and modification to the normal interconnect manufacturing process. A typical manufacturing method for a capacitor or an antifuse element in an interconnect system is described in U.S. Pat. No. 6,124,194 with reference to FIGS. 1A-1D. As shown in FIG. 1A, two exposed metal lines 102, 104 are formed in an insulation layer 100. Another insulation layer 106 is formed over the insulation layer 100 covering the metal lines 102, 104. The insulation layer 106 further comprises a via 108 therein, wherein the via 108 is in contact with the metal line 102. A silicon nitride layer 110 is formed over the insulation layer 106 and the via 108. The silicon nitride layer 110 is further patterned to form an opening 112 over the via 108 and an opening 114 over the first insulation layer 106 over the metal line 104. Referring to FIG. 1B, a fusing element layer 116 is then formed over the structure, covering the patterned silicon nitride layer 110 and filling the openings 112, 114. Referring to FIG. 1C, the fusing element layer 116 is patterned to form a capacitor element or a fusing element 118 in the opening 112. An insulation layer 120 is formed over the structure. The insulation layer 120 is patterned to form a metal line opening 122 over the capacitor element 118 and a conductive line opening 124 in the second insulation layer 120. The first insulation layer 106 is further patterned to form a via opening 126. Continuing to FIG. 1D, a metal layer is deposited to form a metal line 130 and a dual damascene structure 132.
However, as can be seen from the above discussion, the manufacturing process to integrate a capacitor in an interconnect system is complicated. Since multiple masking steps are required to form a capacitor and an interconnect system, the resulting process is expensive and time-consuming.